As input/output (I/O) speeds continue to increase, the electrical interconnects currently used to connect circuit elements will run out of bandwidth. Optical interconnects have been proposed as a potential solution to this problem since optical interconnects are capable of providing very high total bandwidth. However, current optical interconnect solutions are inadequate for many reasons.
FIG. 1 shows an example of an optical interconnect. In FIG. 1 a control chip 110 is electrically connected to an optoelectrical (OE) die 120. An OE die is an interface between electrical signals and optical signals OE die 120 either converts electrical signals from the control chip to optical signals or converts optical signal from the waveguide to electrical signals. The optical signals are transmitted from the OE die's optical source (such as a laser) through planar waveguide 130 which is partially buried in substrate 140. The optical waveguide carries the optical signals to connector 150. Although the optical interconnect of FIG. 1 is operable, there are many problems with this approach:                1. The fabrication and assembly of planar waveguide 130 and connector 150 are not High Volume Manufacturing (HVM) compatible;        2. A trench must be made in the substrate so that the planar waveguide can fit under the OE die; and        3. Alignment between the OE die and planar waveguide is currently done by semi-active alignment        
Other problems with current optical interconnect methodologies include:                1. Optical alignment between the OE die and the waveguide is a big challenge;        2. Handling of the optical interconnect is considered a major concern from Original Equipment Manufacturers (OEM).        
There has been some research on embedding an OE die inside the core of a waveguide where the waveguide is embedded inside a motherboard or a substrate. For example, embedding a thin edge emitting laser into an organic substrate has been demonstrated before. However this type of approach has too large of an impact on current motherboard and substrate technology and is too costly.
Thus, there is a need for an optical interconnect which, for example:                1. Provides flexible high-bandwidth interconnect between chips (such as a CPU and a Memory Controller Hub (MCH));        2. Eliminates the need for optical alignment between the OE die and waveguide during assembly because the OE die is at least partially embedded inside the waveguide (lower cladding layer, upper cladding layer, and core layer);        3. Eliminates the need for handling the optical interconnect at OEM; and        4. Does not impact current substrate and motherboard technology.        